AMD presented some more details of the Ryzen 7000 series at the Computex 2022 keynote. At CES in early January there was confirmation of the use of a Land Grid Array (LGA) for the AM5 socket and a demo of a Zen 4 processor that is said to have run at 5 GHz on all cores. Another detail, which was already confirmed back then, was the fact that the CCDs with the Zen 4 cores should be manufactured in 5 nm.
In the old tradition, AMD therefore chooses Computex as the date for the first or full details of its Ryzen processors. This can probably also be explained by the fact that the mainboard manufacturers are based in Taiwan and this gives them the opportunity to present their new subsets. In addition to further details on the Ryzen 7000 processors aka Raphael, AMD today gives the first details on the associated chipsets. These would be the X670E, X670 and B650.
The motherboards with the X670E chipset are said to be the ultimate for the first AM5 processors. This also refers to the power supply of the base. With the X670, some compromises have to be made with regard to the connection via PCIe 5.0. Only one M.2 and the primary graphics card slot will support PCIe 5.0 – this will be more than enough for most users. The B650 chipset and the corresponding mainboards should be the ideal compromise between price and performance.
The Zen 4 architecture has not yet been explained in all details, but the fact that the L2 cache has now increased to a total of 1 MB. This circumstance is already over first benchmark leaks known and may be the only change in the cache hierarchy.
| Game | Zen 1 | zen 2 | Zen 3 | Zen 4 |
| L1 cache per core | 96KB (64 + 32KB) | 64 kB (32 + 32 kB) | 64 kB (32 + 32 kB) | 64 kB (32 + 32 kB) |
| L2 cache per core | 512KB | 512KB | 512KB | 1MB |
| L3 cache | 2x 16MB per CCX / for 2x 4 cores | 2x 16MB per CCX / for 2x 4 cores | 32MB per CCD / for 8 cores | 32MB per CCD / for 8 cores |
The L1 cache remains unchanged at 64 kB. This also applies to the 32 MB of L3 cache per CCD, which is available to all eight cores.
Among other things, the larger L2 cache per core, but also other changes with regard to the Zen 4 architecture should ensure an IPC plus of more than 15% – AMD probably did not want to let us take a closer look at the cards. More details about Zen 4 will probably be presented when the processors are launched, which is not the case today.
But AMD lets you look at the cards with what is under the heat spreader of the new AM5 package. There are one or two CCDs here again, but they are now manufactured at 5 nm at TSMC. The CCD contains up to eight Zen 4 cores. These achieve a clock rate of 5 GHz and more – AMD didn’t want to be more precise here either. A Ryzen 7000 processor with 5.5 GHz was shown in a demo.
The CCDs are supported by the IOD (I/O die), which includes the controllers for the DDR5 main memory and the PCI Express 5.0 lanes. The Ryzen 7000 processors offer a total of 24 PCIe 5.0 lanes. In addition, the IOD has an integrated graphics unit based on the RDNA 2 architecture. AMD does not reveal anything about their expansion level, but now systems with a standard Ryzen processor can also do without a dedicated graphics card, should this be necessary.
AMD wants to launch the Ryzen 7000 processors in the fall. Accordingly, all details on the Zen 4 architecture, the expansion stages of the cores for the different model variants and the new functions of the IOD can be expected at a later date.